instruction execution
英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]
美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]
网络 指令执行
英英释义
noun
- (computer science) the process of carrying out an instruction by a computer
双语例句
- The model of instruction level parallel program execution
指令级并行程序执行模型 - This article probes into a kind of encryption method for files, which is different from the usual way. It also studies the encryption method for instruction inverse execution, which means how to use inverse instruction stream to realize the file encryption.
研究一种打破常规的文件加密方法，指令的逆运动加密方法，即如何采用逆指令流来实现对计算机文件的加密。 - In the traditional Cache, the Cache hit ratio is insured only by the address locality of memory reference instruction stream during program execution, it restricts the improvement of Cache hit ratio.
在传统的Cache中，仅仅依靠程序执行时访存指令流地址的局域性来保证较高的Cache命中率，使得Cache命中率的提高受到限制。 - Pipeline is dealing with instruction, including instruction decode, issue, and execution.
流水线正在处理指令，包括指令解码、发布和执行。 - This thesis sets forth case instruction in terms of executive condition, organizing execution and realistic meaning and so on.
文中从案例教学法的实施条件、组织实施过程、现实意义等方面进行了阐述。 - Characteristics of the microprocessor are fast speed and nimble instructions. The way of raising speed is to adopt pipelining in instruction execution.
它的运算速度提高的途径是指令的执行采用流水线方式，指令缓冲部件IB采用两个体交替接收指令和执行指令的办法来减少取指令的等待时间。 - As the core of SOC, CPU ′ s performance is mostly determined by instruction ′ s execution efficiency. Pipeline increases the instruction ′ s execution pace and improves the CPU ′ s performance.
作为SOC的核心，CPU的性能主要取决于指令的执行效率，而采用流水线方式大大增加了指令的执行速度，提高了CPU的性能。 - Based on the ( program counter) PC arbitrage strategy of multi-path execution, designing fetch instruction unit suit for selective dual path execution.
通过研究多路径执行中的PC仲裁机制，设计适合双路径执行结构的取指部件。 - This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture, issuing multiple instructions in one machine cycle. Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed.
本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系，并分析了新型超标量RISC结构的实现方案，其中包括具有单个执行部件和多个执行部件的结构。 - A4-stage instruction pipeline for instruction execution makes at-speed test possible.
四级指令流水线的引入使全速测试成为可能。